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 HAF2026RJ
Silicon N Channel Power MOS FET Power Switching
REJ03G1255-0200 Rev.2.00 Jun 02, 2006
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc..
Features
* * * * * Logic level operation (5 to 6 V Gate drive) Built-in the over temperature shut-down circuit High endurance capability against to the shut-down circuit Latch type shut down operation (need 0 voltage recovery) Built-in the current limitation circuit
Outline
RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 (FP-8DAV))
8 5 76
3 12
4
1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain
D 7
D 8
D 5
D 6
2 G Gate Resistor
Current Limitation Circuit Gate Shut-down Circuit 1 S
4 G Gate Resistor
Current Limitation Circuit Gate Shut-down Circuit 3 S
Temperature Sensing Circuit
Latch Circuit
Temperature Sensing Circuit
Latch Circuit
MOS1
MOS2
Rev.2.00
Jun 02, 2006
page 1 of 8
HAF2026RJ
Absolute Maximum Ratings
(Ta = 25C)
Item Symbol Ratings Drain to source voltage VDSS 60 Gate to source voltage VGSS 16 Gate to source voltage VGSS -2.5 Drain current ID 0.6 Body-drain diode reverse drain current IDR 1 Avalanche current IAPNote3 0.6 Avalanche energy EARNote3 1.54 Cannel dissipation PchNote1 1 Cannel dissipation PchNote2 1.5 Cannel temperature Tch 150 Storage temperature Tstg -55 to +150 Notes: 1. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10s 2. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10s 3. Tc = 25C, Rg 50 Unit V V V A A A mJ W W C C
Typical Operation Characteristics
(Ta=25C)
Item Input voltage Input current (Gate non shut down) Input current (Gate shut down) Shut down temperature Gate operation voltage Drain current (Current limitation) Symbol VIH VIL IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd Vop ID limt Min 3.5 -- -- -- -- -- -- -- 3.5 0.6 Typ -- -- -- -- -- 0.53 0.23 175 -- -- Max -- 1.2 100 50 1 -- -- -- 12 1.0 Unit V V A A A mA mA C V A Test Conditions
Vi = 8 V, VDS = 0 Vi = 3.5 V, VDS = 0 Vi = 1.2 V, VDS = 0 Vi = 8 V, VDS = 0 Vi = 3.5 V, VDS = 0 Cannel temperature Vi = 5 V, VDS = 3 V
Rev.2.00
Jun 02, 2006
page 2 of 8
HAF2026RJ
Electrical Characteristics
(Ta = 25C)
Item Drain current Symbol ID1 ID2 ID3 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS1 IDSS2 VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF trr tos1 Min 0.25 -- 0.6 60 16 -2.5 -- -- -- -- -- -- -- -- 1.4 0.26 -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -- 0.53 0.23 -- -- -- 1.3 200 150 140 2.9 11 0.9 1 0.9 61 85 30 Max -- 10 1.0 -- -- -- 100 50 1 -100 -- -- 10 10 2.5 -- 300 210 -- -- -- -- -- -- -- -- -- Unit A mA A V V V A A A A mA mA A A V S m m pF s s s s V ns ms ms Test Conditions VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V VGS = 5 V, VDS = 3 V ID = 10 mA, VGS = 0 IG = 800 A, VDS = 0 IG = -100 A, VDS = 0 VGS = 8 V, VDS = 0 VGS = 3.5 V, VDS = 0 VGS = 1.2 V, VDS = 0 VGS = -2.4 V, VDS = 0 VGS = 8 V, VDS = 0 VGS = 3.5 V, VDS = 0 VDS = 60 V, VGS = 0 VDS = 48 V, VGS = 0, Ta = 125C VDS = 10 V, ID = 1 mA ID = 0.5 A, VDS = 10 VNote4 ID = 0.5 A, VGS = 5 VNote4 ID = 0.5 A, VGS = 10 VNote4 VDS = 10 V, VGS = 0, f = 1MHz VGS = 5 V, ID= 0.5 A, RL = 60
Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current
Input current (shut down) Zero gate voltage drain current Gate to source cut off voltage Forward transfer admittance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over load shut down note5 operation time
IF = 1 A, VGS = 0 IF = 1 A, VGS = 0, diF/dt = 50 A/s VGS = 5 V, VDD = 16 V VGS = 5 V, VDD = 24 V
tos2 Notes: 4. Pulse test 5. Including the junction temperature rise of the over lorded condition.
Rev.2.00
Jun 02, 2006
page 3 of 8
HAF2026RJ
Main Characteristics
Power vs. Temperature Derating
4.0 10 Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW 10s) 3 1
PW
1 ms
Maximum Safe Operation Area
Thermal shut down operation area
Channel Dissipation Pch (W)
3.0
Drain Current ID (A)
2.0
0.3 0.1
=
2D
1.0
riv
er
Op
1D
era
Operation in this area is limited by RDS(on)
10
D C O n tio ra pe
m s
< PW
N
rive
tio
n
ot
rO
n
0.03 Ta = 25C 0.01 0.01 0.03 0.1 0.3
1 shot Pulse 1 Driver Operation
e6
s 10
per
atio
0
50
100
150
200
1
3
10
30 100
Ambient Temperature Ta (C)
Drain Source Voltage VDS (V)
Note 6: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm)
Typical Output Characteristics 2.0 1.6 1.2 0.8 0.4
10 V 5V VGS = 3.5 V
Typical Transfer Characteristics 1.0
VDS = 10 V Pulse Test
Pulse Test
Drain Current ID (A)
Drain Current ID (A)
0.8 0.6 0.4 0.2
75C 25C Tc = -25C
0
2
4
6
8
10
0
1
2
3
4
5
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V) Static Drain to Source State Resistance vs. Drain Current
Drain to Saturation Voltage vs. Gate to Source Voltage
Drain to Source Saturation Voltage VDS(on) (mV)
Pulse Test 160
Drain Source On Sate Resistance RDS(on) (m)
200
500 VGS = 5 V 200 100 50 VGS = 10 V
120 ID = 0.5 A
80
40
0.2 A
20 10 0.01 0.02 Pulse Test 0.05 0.1 0.2 0.5 1 2
0
2
4
6
8
10
Gate to Source Voltage VGS (V)
Drain Current ID (A)
Rev.2.00
Jun 02, 2006
page 4 of 8
HAF2026RJ
Drain to Source On State Resistance vs. Temperature
Forward Transfer Admittance |yfs| (S) Drain Source On State Resistance RDS(on) (m)
500 10 VDS =10 V 3 Pulse Test 1 0.3 0.1 0.03 0.01 0.003 0.001 0.01 0.03 0.1 0.3 1 75C 25C Tc = -25C Pulse Test
Forward Transfer Admittance vs. Drain Current
400 ID = 0.5 A, 0.2 A 300 VGS = 5 V 200 ID = 0.5 A, 0.2 A 100 0 -25 VGS = 10 V
0
25
50
75
100 125 150
Case Temperature Tc (C)
Drain Current ID (A)
Body to Drain Diode Reverse Recovery Time
Reverse Recovery Time trr (ns)
1000 500 200 100 50 20 10 5 2 1 0.01 0.02 di / dt = 50 A / s VGS = 0, Ta = 25C 0.05 0.1 0.2 0.5 1 100 30 10 3 1 0.3
Switching Characteristics
VGS = 5 V, VDD = 30 V PW = 300 s, duty < 1 % tr td(on) tf td(off)
Switching Time t (s)
0.1 0.001 0.003 0.01 0.03
0.1
0.3
1
Reverse Drain Current IDR (A) Reverse Drain Current vs. Source to Drain Voltage
1.0
Drain Current ID (A) Typical capacitance vs. Drain to Source Voltage
1000
Reverse Drain Current IDR (A)
Pulse Test
0.8
Capacitance Coss (pF)
100
0.6
VGS = 5 V
0V
0.4
10
0.2
VGS = 0 f = 1 MHz 1 0 10 20 30 40 50
0
0.2
0.4
0.6
0.8
1.0
Source to Drain Voltage VSD (V)
Drain to Source VDS (V)
Rev.2.00
Jun 02, 2006
page 5 of 8
HAF2026RJ
Gate to Source Voltage vs. Shutdown Time of Load-Short Test
Shutdown Case Temperature Tc (C) Gate to Source Voltage VGS (V)
12 10 8 6 24 V 4 2 0 0.001 VDD = 16 V 200
Shutdown Case Temperature vs. Gate to Source Voltage
180
160
140
120 100 0
ID = 0.2 A
0.01
0.1
1
2
4
6
8
10
Shutdown Time of Lord-Short Test PW (S) Avalanche Energy vs. Channel Temperature Derating
Repetitive Avalanche Energy EAR (mJ)
2.0 IAP = 0.6 A VDD = 25 V duty < 0.1 % Rg > 50
Gate to Source Voltage VGS (V)
1.5
1
0.5
0 25
50
75
100
125
150
Channel Temperature Tch (C)
Avalanche Test Circuit
Avalanche Waveform
1 2 VDSS * L * IAP2 * VDSS - VDD
VDS Monitor
L IAP Monitor
EAR =
V(BR)DSS IAP VDD ID VDS
Rg
D. U. T
Vin 5V
50 0 VDD
Rev.2.00
Jun 02, 2006
page 6 of 8
HAF2026RJ
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
10
Normalized Transient Thermal Impedance s (t)
1
D=1 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
p ot uls e
ch-f(t) = s (t) * ch - f ch-f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
PDM PW T
0.001
1s
h
D=
PW T
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Normalized Transient Thermal Impedance s (t)
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
10
1
D=1 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
uls e
ch-f(t) = s (t) * ch - f ch-f = 166C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
PDM PW T
0.001
1s h
p ot
D=
PW T
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor D.U.T. RL VDD = 30 V Vin Vout Vin 5V 50 Vout Monitor
Switching Time Waveform
90% 10% 10% 10%
90%
90% td(off) tf
td(on)
tr
Rev.2.00
Jun 02, 2006
page 7 of 8
HAF2026RJ
Package Dimensions
Package Name SOP-8 JEITA Package Code P-SOP8-3.95 x 4.9-1.27 RENESAS Code PRSP0008DD-D Previous Code FP-8DAV MASS[Typ.] 0.085g
*1 D
F
8
5
*2 E HE
bp
Index mark
1
Z e
4
* 3 bp xM
c
Terminal cross section (Ni/Pd/Au plating)
NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
Reference Symbol
Dimension in Millimeters
Min
L1
L
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Nom Max 4.90 5.3 3.95
A
0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25
A1
y
Detail F
0 8 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08
Ordering Information
Part Name HAF2026RJ-EL-E Quantity 2500 pcs Taping Shipping Container
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.2.00
Jun 02, 2006
page 8 of 8
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
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Colophon .6.0


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